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![DRAM as a main memory](https://vonoff.com/comics/We_are_Memories-P1-en.jpg)
![Growing gap between processor and memory speed](https://vonoff.com/comics/We_are_Memories-P2-en.jpg)
![different priority between processor and memory](https://vonoff.com/comics/We_are_Memories-P3-en.jpg)
![SRAM cache memory to bridge the latency gap between cpu and memory](https://vonoff.com/comics/We_are_Memories-P4-en.jpg)
![memory trade-offs](https://vonoff.com/comics/We_are_Memories-P5-en.jpg)
![SSD to bridge the latency gap between DRAM and HDD storage](https://vonoff.com/comics/We_are_Memories-P6-en.jpg)
![NVMe SSD using PCIe interface](https://vonoff.com/comics/We_are_Memories-P7m-en.jpg)
Emerging high performance NVMe SSDs using PCI interface - Micron's NVMe SSDs
![ssd data retention in extrem conditions](https://vonoff.com/comics/We_are_Memories-P8-en.jpg)
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Reference
- Carlos , Carvalho. Universidade do Minho. “The Gap between Processor and Memory Speeds.”
- Zahran, M. New York University. Lecture 3: "The Memory System."
- Onur , Mutlu, et al. Carnegie Mellon University. “The Main Memory System: Challenges and Opportunities.”
- Lee, Donghyuk, et al. Carnegie Mellon University. “Tiered-Latency DRAM: A Low Latency and Low Cost DRAM Architecture.”
- “Samsung NVMe SSD.”
- Pratt, Tom. Micron. “The Real World of Emerging Memories.”
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