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Home / Comics / A trip down memory lane -#2: The sorrow of DRAM scaling challenge

A trip down memory lane -#2: The sorrow of DRAM scaling challenge

November 25, 2017 By sky

Summary

DRAM finds itself in a corner as newer and more advanced memories start to emerge. Can DRAM overcome its physical scaling limit and stay relevant?

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universal memory combined strenths of DRAM and NAND
P1
Looking for a universal memory is a dream
P2
DRAM is i a corner due to the physical scaling limit
P3
Do you believe that STT-MRAM will replace DRAM?
P4
a new memory,3D-Xpoint is unveild
P5
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Reference

  1. "Prospect for New Memory Technology." Park, Sung Wook. Hynix. 2012
  2. “Characterization and Metrology Challenges for Emerging Memory Challenges for Emerging Memory Technology Landscape.” Chandrasekara Naga, et al. Micron. https://www.nist.gov/sites/default/files/documents/pml/div683/conference/chandrasekaran2013.pdf.
  3. “The Real World of Emerging Memories.” Pratt Tom. Micron. http://hpcsociety.org/resources/documents/Micron%20Emerging%20Memories%20042816.pdf.
  4. “Introducing Intel® Optane™ Technology – Bringing 3D XPoint™ Memory to Storage and Memory Products.” Intel Newsroom, newsroom.intel.com/press-kits/introducing-intel-optane-technology-bringing-3d-xpoint-memory-to-storage-and-memory-products/.
  5. Jim, Elliot, and Brennan Bob. “Indu Stry Inno Va Tion with Sam Sung ’s Next Genera Tion V-NAND .” Flash memory summit. 2014, www.flashmemorysummit.com/English/Collaterals/Proceedings/2014/20140805_Keynote2_Samsung.pdf.

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Filed Under: Comics, Memory technology, Nanotechnology Tagged With: 3D-VNAND, 3D-Xpoint, DRAM capacitor process challenge, DRAM scaling limit, ideal memory, universial memory, 디램 공정미세화 한계, 차세대메모리

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